Inhalt der Folge:

• Rückblick auf die FPGA Conference 2024
• Besuchte Sessions
  • Dienstag
    • Fast data transmission with Artix UltraScale+ via various interfaces
    • 100GbE from FPGA to Disk
    • Open-Source FPGA Tools and Frameworks
    • All FPGAs are equal, but some FPGAs are more equal
    • Why Should Our Team be Using VHDL+OSVVM for verification?
    • FPGA Based 400GBit/s Data Recorder – Insight into different pitfalls and design choices
  • Mittwoch
    • Verifying a simple DUT (FPGA or module) from scratch with basic verification – for beginners
    • Verifying a complex DUT in a simple way from scratch
    • What challenges do we encounter while working at the edge of technology
    • RTL on a Higher Level: Introducing the Hierarchical FSMD
    • Constraining Multiple Clock Domains
  • Donnerstag
    • MicroBlaze V – the AMD/Xilinx way to do RISC-V
    • Using OSVVM’s AXI4 Verification Component
    • Perfecting PetaLinux – a hands on tutorial Part 1+2
• Meine Session am Dienstag
  • Video Stream Verarbeitung im Zynq 7000
• Ingenieure führen Camp
• Sommerpause